Memory management procedures for write boost mode
US12265710B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2021 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Sep 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0685
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for memory management procedures for write boost mode are described. A memory system may receive a command to write data. The memory system may write the data to a first location of the memory system using a first mode for storing one bit per memory cell based on receiving the command. The memory system may select a first portion of the data to rewrite to the memory system using a second mode for storing two or more bits per memory cell based on one or more parameters satisfying one or more thresholds. The memory system may write the first portion of the data to a second location of the memory system using the second mode based on selecting the first portion of the data. The memory system may maintain a second portion of the data at the first location of the memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.