Directed self-assembly enabled patterning over metal layers using assisting features

US12266527B1 · kind B1 · utility

Assignee

• Intel Corporation · US

Inventors

• Gurpreet Singh · Alwar, IN
• Nityan NAIR · Portland, US
• Nafees Kabir · Portland, US
• Eungnak Han · Portland, US
• Xuanxuan Chen · Heverlee, BE
• Brandon Holybee · Portland, US
• Charles H. Wallace · Portland, US
• Paul A. Nyhus · Portland, US
• Manish Chandhok · Beaverton, US
• Florian Gstrein · Portland, US
• David Shykind · Buxton, US
• Thomas HOFF · Hillsboro, US

Key dates

• Filing date: Dec 22, 2021
• Grant date: Apr 1, 2025
• Expiry date: Jun 4, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/0271
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Described herein are IC devices include patterned conductive layers, such as metal gratings and gate layers, and patterned layers formed over the patterned conductive layers using a directed self-assembly (DSA)-enabled process with DSA assisting features. A patterned conductive layer may have non-uniform features, such as large regions of insulator within a metal grating, or varying gate lengths across a gate layer. The DSA assisting features enable the formation of patterned layers, e.g., layers with different hard mask materials replicating the structure of the conductive layer below, even over non-uniform features.