Method of making electrostatic discharge protection cell and antenna integrated with through silicon via
US12272658B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 25, 2024 |
| Grant date | Apr 8, 2025 |
| Priority date | — |
| Expiry date | Mar 25, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6677
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor device includes manufacturing an ESD cell over a substrate, wherein the ESD cell includes multiple diodes connected in parallel to each other. The method includes manufacturing a conductive pillar electrically connected to the ESD cell of the semiconductor device; manufacturing a through-silicon via (TSV) extending through the substrate, wherein the TSV extends through the substrate within a TSV zone having a TSV zone perimeter, and wherein a first end of the TSV is at a same side of the substrate as the ESD cell, and a second end of the TSV is at a different side of the substrate from the ESD cell. The method includes manufacturing an antenna extending parallel to the TSV at a same side of the substrate as the ESD cell; and manufacturing an antenna pad electrically connected to the TSV, the antenna, and the conductive pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.