Full-chip cell critical dimension correction method and method of manufacturing mask using the same
US12282249B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2022 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Nov 2, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70625
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A full-chip cell critical dimension (CD) correction method and a method of manufacturing a mask by using the same are provided. The full-chip cell CD correction method includes receiving a database (DB) about a full-shot; analyzing a hierarchy of the DB; generating a density map of a full-chip by using the DB and converting the density map into a retarget rule table, the converting including mapping the density map by using a density rule; reconfiguring cell blocks of the full-chip into an optical proximity correction (OPC) target cell layout for OPC; applying a first bias to the OPC target cell layout, based on the retarget rule table; and generating an optical proximity corrected (OPC'ed) layout for the full-chip by performing hierarchical OPC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.