Patent · US Active

Fill pattern for power transistor and diode devices

US12288819B2 · kind B2 · utility

0Cited by

6References

32Claims

0Family size

Assignee

Infineon Technologies Dresden GmbH & Co. KG · DE

Inventors

Rolf Weis · Dresden, DE
Ahmed Mahmoud · Freising, DE
Marco Mueller · Villach, AT

Key dates

Filing date	Sep 20, 2021
Grant date	Apr 29, 2025
Priority date	—
Expiry date	Aug 26, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/811

Abstract

According to an embodiment of a semiconductor device, the device includes: a transistor or diode device formed in a semiconductor substrate; an insulating material at least partially covering a lateral drift zone of the transistor or diode device or a termination region; and a fill pattern disposed over the lateral drift zone or termination region, the fill pattern having a variable density that follows equipotential lines of an electric field distribution expected between the fill pattern at a surface of the lateral drift zone or termination region during operation of the semiconductor device. Corresponding methods of producing the semiconductor device are also described.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.