Rolf Weis
108Patents
11h-index
103Co-inventors
83Inventor score
Filing activity: Sep 15, 1997 → May 17, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8569842B2 | Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices | Electricity | 73 | Active |
| US7132333B2 | Transistor, memory cell array and method of manufacturing a transistor | Electricity | 40 | Expired |
| US8970262B2 | Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices | Electricity | 27 | Active |
| US8455948B2 | Transistor arrangement with a first transistor and with a plurality of second transistors | Electricity | 20 | Active |
| US7635893B2 | Transistor, memory cell array and method of manufacturing a transistor | Electricity | 19 | Expired |
| US6576944B2 | Self-aligned nitride pattern for improved process window | Electricity | 18 | Expired |
| US7642572B2 | Integrated circuit having a memory cell array and method of forming an integrated circuit | Electricity | 16 | Active |
| US7727837B2 | Method of producing an integrated circuit having a capacitor with a supporting layer | Electricity | 15 | Active |
| US6599798B2 | Method of preparing buried LOCOS collar in trench DRAMS | Electricity | 14 | Expired |
| US7569878B2 | Fabricating a memory cell array | Electricity | 12 | Expired |
| US6448610B2 | Memory cell with trench, and method for production thereof | Electricity | 11 | Expired |
| US6496401B2 | Memory cell configuration | Electricity | 10 | Expired |
| US7763513B2 | Integrated circuit device and method of manufacture | Electricity | 10 | Active |
| US8866253B2 | Semiconductor arrangement with active drift zone | Electricity | 10 | Active |
| US7301192B2 | Dram cell pair and dram memory cell array | Electricity | 9 | Expired |
| US8595449B2 | Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition | Physics | 7 | Active |
| US8971080B2 | Circuit arrangement with a rectifier circuit | Emerging Cross-Sectional Technologies | 7 | Active |
| US6667504B1 | Self-aligned buried strap process using doped HDP oxide | Electricity | 6 | Expired |
| US8759939B2 | Semiconductor arrangement with active drift zone | Electricity | 6 | Active |
| US5964466A | Sealing device | Mechanical Engineering; Lighting; Heating | 6 | Expired |
| US6893938B2 | STI formation for vertical and planar transistors | Electricity | 6 | Expired |
| US5984312A | Sealing device | Mechanical Engineering; Lighting; Heating | 6 | Expired |
| US9035690B2 | Circuit arrangement with a first semiconductor device and with a plurality of second semiconductor devices | Electricity | 6 | Active |
| US7442609B2 | Method of manufacturing a transistor and a method of forming a memory device with isolation trenches | Electricity | 6 | Active |
| US8995158B2 | Circuit arrangement with a rectifier circuit | Emerging Cross-Sectional Technologies | 6 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.