Semiconductor device having multi-bridge channel field-effect transistor including source/drain pattern with a plurality of semiconductor patterns
US12289908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2024 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | May 10, 2044 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes an active pattern including a lower pattern and a plurality of sheet patterns; a gate structure disposed on the lower pattern and surrounding the plurality of sheet patterns; and a source/drain pattern filling a source/drain recess formed on one side of the gate structure. The source/drain pattern includes a first semiconductor pattern extending along the source/drain recess and contacting the lower pattern, a second and third semiconductor patterns sequentially disposed on the first semiconductor pattern, a lower surface of the third semiconductor pattern is disposed below a lower surface of a lowermost sheet pattern, a side surface of the third semiconductor pattern includes a planar portion, and a thickness of the second semiconductor pattern on the lower surface of the third semiconductor pattern is different from a thickness of the second semiconductor pattern on the planar portion of the side surface of the third semiconductor pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.