Semiconductor structure and manufacturing method thereof
US12295151B2 · kind B2 · utility
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4References
10Claims
0Family size
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Key dates
| Filing date | Jan 19, 2022 |
| Grant date | May 6, 2025 |
| Priority date | — |
| Expiry date | Jun 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide a semiconductor structure and a manufacturing method thereof. The manufacturing method includes: providing a base; forming a bottom electrode layer on the base, wherein a crystal structure of the bottom electrode layer includes a tetragonal crystal system; forming a first dielectric layer on a surface of the bottom electrode layer by using the bottom electrode layer as a seed layer, wherein a crystal structure of the first dielectric layer includes a tetragonal crystal system; and forming a first current blocking layer on a surface of the first dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.