Patent · US Active

Data processing array event trace customization, offload, and analysis

US12298887B2 · kind B2 · utility

0Cited by

7References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Paul R. Schumacher · Berthoud, US
Anurag Dubey · Boulder, US
Roger Ng · Campbell, US
Ishita Ghosh · San Jose, US
Scott H. Jonas · Niwot, US
Krishnan Subramanian · Shakopee, US
Jason Villarreal · Los Gatos, US

Key dates

Filing date	Apr 21, 2023
Grant date	May 13, 2025
Priority date	—
Expiry date	Apr 21, 2043

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/348
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Event trace includes implementing a design for a data processing array of a target integrated circuit (IC) by, at least in part, adding a trace data offload architecture to the design. One or more selected tiles of the data processing array used by the design as implemented in the target IC are configured to generate trace data based on user-specified runtime settings for performing a trace. During execution of the design by the data processing array, trace data as generated by the one or more selected tiles of the data processing array is conveyed to a memory of the target IC using the trace data offload architecture. A trace report is generated from the trace data using a data processing system coupled to the target IC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.