Cyclic cooling embedded packaging substrate and manufacturing method thereof
US12300576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | May 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73267
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A cyclic cooling embedded packaging substrate and a manufacturing method thereof are disclosed. The packaging substrate includes a dielectric material body, a chip, a first metal face, a second metal face and a first trace. The dielectric material body is provided with a packaging cavity, the chip is packaged in the packaging cavity, the first metal face is embedded in the dielectric material body, covers and is connected to a heat dissipation face of the chip. The second metal face is embedded in the dielectric material body, connected to a surface of the first metal face, and is provided with a first cooling channel pattern for forming a cooling channel. The first trace is arranged on a surface of the dielectric material body or embedded therein, and is connected with a corresponding terminal on an active face of the chip through a first conductive structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.