Semiconductor devices and data storage systems including the same
US12302580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2021 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Mar 8, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a first substrate; active or passive circuits on the first substrate; a second substrate above the active or passive circuits; gate electrodes stacked on the second substrate to be spaced apart from each other in a first direction; channel structures penetrating through the gate electrodes and extending in the first direction, and each including a channel layer; separation regions penetrating through the gate electrodes and extending in a second direction; a through-contact plug extending through the second substrate in the first direction and electrically connecting the gate electrodes and the active or passive circuits to each other; and a barrier structure spaced apart from the through-contact plug and surrounding the through-contact plug and having first regions each having a first width, and second regions each having a second width greater than the first width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.