Semiconductor structure and manufacturing method thereof
US12302634B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Jul 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate; a first transistor, located on the substrate; a second transistor, located above the first transistor; and a gate structure, the gate structure including a first gate layer and a second gate layer, which connected to each other, the first gate layer surrounding the first transistor and the second gate layer surrounding the second transistor; an extension direction of the first transistor and an extension direction of the second transistor are both perpendicular to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.