Volatile memory devices and methods of operating same to improve reliability
US12308083B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2023 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Oct 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A volatile memory device includes an array of memory cells connected to word lines, and bit lines, which are connected to a bitline sense amplifier. Control logic is provided, which is configured to control: (i) consecutive self-refresh operations within the array of memory cells, (ii) storage of dummy data within the array of memory cells during operations to predict life expectancy of memory cells therein, (iii) consecutive test refresh operations within the array of memory cells, and (iv) performance of test sensing operations on selected memory cells within the array using the bitline sense amplifier. A deterioration detection circuit is provided, which is configured to receive sensing results associated with the selected memory cells from the bitline sense amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.