Thin film transistor substrate
US12310058B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2021 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Dec 17, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
Abstract
A thin film transistor substrate includes a substrate and a semiconductor layer disposed on the substrate. The semiconductor layer includes a channel region, a source region and a drain region. The thin film transistor further includes a gate electrode disposed on the semiconductor layer and that includes a lower surface and an upper surface. The thin film transistor includes a gate insulating layer disposed between the gate electrode and the semiconductor layer, and a first insulating layer disposed on the substrate. The first insulating layer exposes the upper surface of the gate electrode and surrounds the gate electrode. The gate electrode may have a shape in which the width of an upper surface thereof is greater than the width of a lower surface thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.