Semiconductor structure and fabrication method thereof

US12310071B2 · kind B2 · utility

Assignee

• UNITED MICROELECTRONICS CORP. · TW

Inventors

• Chia-Ling Wang · Yuliao, TW
• Ping-Hung Chiang · Hengshan, TW
• Wei-Lun Huang · Sunnyvale, US
• Chia-Wen Lu · Dingshanjiao, TW
• Ta-Wei Chiu · 埔鹽鄉, TW

Key dates

• Filing date: Jul 3, 2024
• Grant date: May 20, 2025
• Expiry date: Jul 3, 2044

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0144

Abstract

A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A trench isolation structure is disposed in the substrate between the first device region and the second device region. The trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is coplanar with the second bottom surface.