Monolithic growth of epitaxial silicon devices via co-doping
US12310086B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 17, 2022 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Mar 17, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/70
Abstract
In one general embodiment, a structure includes a first diode, comprising: a first layer having a first type of dopant, and a second layer above the first layer, the second layer having a second type of dopant that is opposite to the first type of dopant. A second diode is formed directly on the first diode. The second diode comprises a first layer having a third type of dopant and a second layer above the first layer of the second diode, the second layer of the second diode having a fourth type of dopant that is opposite to the third type of dopant. In another general embodiment, a process includes a repeated sequence of growing a first layer having a first type of electrically active dopant and growing a second layer having a second type of electrically active dopant that is opposite to the first type of dopant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.