Multi-functional transistors in semiconductor devices
US12310092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2022 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Aug 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device with different gate structures and a method of fabricating the same are disclosed. The a method includes forming a fin structure on a substrate, forming a thermal oxide layer on top and side surfaces of the fin structure, forming a polysilicon structure on the thermal oxide layer, doping portions of the fin structure uncovered by the polysilicon structure to form doped fin portions, forming a nitride layer on the polysilicon structure and the thermal oxide layer, forming an oxide layer on the nitride layer, doping the nitride layer with halogen ions, forming a source/drain region in the fin structure and adjacent to the polysilicon structure, and replacing the polysilicon structure with a gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.