System and method for coalesced multicast data transfers over memory interfaces
US12314588B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 23, 2023 |
| Grant date | May 27, 2025 |
| Priority date | — |
| Expiry date | Oct 23, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses to control digital data transfer via a memory channel between a memory module and a processor are disclosed. At least one of the memory module or the processor coalesces a plurality of short data words into multicast coalesced block data comprising a single data block for transfer via the memory channel. Each of the plurality of short data words pertains to one of at least two partitioned memory submodules in the memory module. The multicast coalesced block data is communicated over the memory channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.