Method and apparatus for etching a semiconductor substrate in a plasma etch chamber
US12315732B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2022 |
| Grant date | May 27, 2025 |
| Priority date | — |
| Expiry date | Aug 25, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for etching a substrate in a plasma etch chamber are provided. In one example, the method includes exposing a substrate disposed on a substrate supporting surface of a substrate support to a plasma within a processing chamber, and applying a voltage waveform to an electrode disposed in the substrate support while the substrate is exposed to the plasma during a plurality of macro etch cycles. Each macro etch cycle includes a first macro etch period and a second macro etch period. The macro etch period includes a plurality of micro etch cycles. Each micro etch cycle has a bias power on (BPON) period and a bias power off (BPOFF) period, wherein a duration of the BPON period being less than a duration of the BPOFF period. Bias power is predominantly not applied to the electrode during the second macro etch period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.