Patent · US Active

Cross-coupled capacitive elements in highspeed DAC

US12316341B2 · kind B2 · utility

0Cited by

2References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Prathamesh Mukund Khatavkar · Dublin, IE
Roberto Pelliconi · Dublin, IE

Key dates

Filing date	Apr 12, 2023
Grant date	May 27, 2025
Priority date	—
Expiry date	Dec 27, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/785
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A digital-to analog converter (DAC) includes an unary cell comprising unary slices, the unary slices are coupled in parallel, an intermediate significant bit (ISB) cell comprising ISB slices, the ISB slices are coupled in parallel, and a least significant bit (LSB) cell comprising LSB slices, the LSB slices are coupled in parallel, the unary cell, the ISB cell and the LSB cell each being coupled to each other, each of the unary slices comprising a set of cross-coupled capacitive elements including first capacitive elements having a first end coupled to a node positioned between a first pair of transistors and a second end coupled to a node positioned between a second pair of transistors, and second capacitive elements having a first end coupled to a node positioned between a third pair of transistors and a second end coupled to a node positioned between a fourth pair of transistors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.