Suspension during a multi-plane write procedure
US12321631B2 · kind B2 · utility
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2References
20Claims
0Family size
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Key dates
| Filing date | Jan 19, 2024 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Jan 19, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for suspension during a multi-plane write procedure are described. A memory system may perform a multi-plane write procedure by writing to a set of planes in parallel. Upon detecting a defective plane in the set of planes, the memory system may suspend writing to the defective plane until writing to the other planes in the set of planes is finished. The memory system may then resume writing to the defective plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.