Program verify process having placement aware pre-program verify (PPV) bucket size modulation
US12322455B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 14, 2021 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Jul 9, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus is described. An apparatus includes controller logic circuitry to perform a program-verify programming process to a flash memory chip. The program-verify programming process is to reduce a size of a pre-program verify (PPV) bucket in response to a number of cells being fully programmed to a same digital state. The number of cells are less than a total number of cells to be programmed to the same digital state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.