Semiconductor device with contracted isolation feature
US12324222B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2022 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Jan 24, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes first and second semiconductor fins, first, second, third and fourth gate structures, and a dielectric structure. The first semiconductor fin and the second semiconductor fin are over a substrate. The first gate structure and the second gate structure respectively extend across the first semiconductor fin and the second semiconductor fin. The first gate structure has a longitudinal axis aligned with a longitudinal axis of the second gate structure. The dielectric structure interposes the first gate structure and the second gate structure. The third gate structure extends across the first and second semiconductor fins. The fourth gate structure extends across the first and second semiconductor fins. The third gate structure is between the fourth gate structure and the dielectric structure. The third gate structure has a maximal width greater than a maximal width of the fourth gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.