Built-in self-test for network on chip fabric
US12332309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2021 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Oct 18, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/333
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system comprising a network-on-chip (NOC) fabric comprising a plurality of routes to communicate data between a plurality of agents; a plurality of built-in self-test (BIST) generators, wherein a BIST generator of the plurality of BIST generators is coupled between an agent of the plurality of agents and the NOC fabric and is to transmit at least one test pattern through the NOC fabric; and a plurality of BIST checkers, wherein a BIST checker of the plurality of BIST checkers is coupled between the agent of the plurality of agents and the NOC fabric and is to receive at least one test pattern through the NOC fabric from at least one of the plurality of BIST generators and to verify whether the at least one test pattern was transmitted correctly through the NOC fabric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.