Inventor · East Lansing, MI, US

Eric Norige

39Patents
14h-index
11Co-inventors
70Inventor score

Filing activity: Aug 30, 2012 → Aug 11, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US8601423B1 Asymmetric mesh NoC topologies Electricity 92 Active
US8667439B1 Automatically connecting SoCs IP cores to interconnect nodes to minimize global latency and reduce interconnect cost Physics 87 Active
US8819611B2 Asymmetric mesh NoC topologies Electricity 55 Active
US9444702B1 System and method for visualization of NoC performance based on simulation output Electricity 51 Active
US9529400B1 Automatic power domain and voltage domain assignment to system-on-chip agents and network-on-chip elements Emerging Cross-Sectional Technologies 32 Active
US8885510B2 Heterogeneous channel capacities in an interconnect Electricity 29 Active
US9473388B2 Supporting multicast in NOC interconnect Electricity 27 Active
US9244880B2 Automatic construction of deadlock free interconnects Electricity 26 Active
US9590813B1 Supporting multicast in NoC interconnect Electricity 26 Active
US9571402B2 Congestion control and QoS in NoC by regulating the injection traffic Electricity 26 Active
US9473359B2 Transactional traffic specification for network-on-chip design Electricity 24 Active
US9471726B2 System level simulation in network on chip architecture Physics 24 Active
US9253085B2 Hierarchical asymmetric mesh with virtual routers Electricity 22 Active
US8819616B2 Asymmetric mesh NoC topologies Electricity 17 Active
US9009648B2 Automatic deadlock detection and avoidance in a system interconnect by capturing internal dependencies of IP cores using high level specification Electricity 12 Active
US9054977B2 Automatic NoC topology generation Electricity 7 Active
US9130856B2 Creating multiple NoC layers for isolation or avoiding NoC traffic congestion Electricity 7 Active
US8934377B2 Reconfigurable NoC for customizing traffic and optimizing performance after NoC synthesis Electricity 6 Active
US9160627B2 Multiple heterogeneous NoC layers Electricity 5 Active
US9185023B2 Heterogeneous SoC IP core placement in an interconnect to optimize latency and interconnect performance Electricity 5 Active
US10496770B2 System level simulation in Network on Chip architecture Physics 4 Active
US10050843B2 Generation of network-on-chip layout based on user specified topological constraints Physics 3 Active
US10063496B2 Buffer sizing of a NoC through machine learning Electricity 2 Active
US9007920B2 QoS in heterogeneous NoC by assigning weights to NoC node channels and using weighted arbitration at NoC nodes Electricity 2 Active
US9864728B2 Automatic generation of physically aware aggregation/distribution networks Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.