Memory device and operating method of the memory device
US12333153B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 21, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Oct 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There are provided a memory device and an operating method of the memory device. The memory device includes: a memory block including first select transistors, memory cells, and second select transistors, which are connected between bit lines and a source line; a precharge controller for monitoring a program operation of the memory cells, and changing a precharge mode of unselected strings among strings included in the memory block according to a monitoring result; and a select line voltage generator for generating a positive voltage or a negative voltage, which is applied to a second select line connected to the second select transistors, according to the precharge mode selected in the precharge controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.