Patent · US Active

Ferroelectric memory circuit and reading method thereof

US12334128B2 · kind B2 · utility

0Cited by

4References

15Claims

0Family size

Assignee

Ferroelectric Memory GmbH · DE

Inventors

Marko Noack · Dresden, DE
Georgi Kuzmanov · Dresden, DE

Key dates

Filing date	Jan 8, 2021
Grant date	Jun 17, 2025
Priority date	—
Expiry date	Mar 17, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/068
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A ferroelectric memory circuit (100) includes: a memory cell (102), wherein a memory state (102s) of the memory cell (102) is switchable between a first memory state and a second memory state, the memory cell (102) further configured to output an electrical current (101) in response to receiving a readout voltage (103); and a sense circuit (104) configured to output an output voltage (105) based on the result of integrating the electrical current (101) output by the memory cell (102), wherein the output voltage (105) represents whether the memory state (102s) is the first memory state or the second memory state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.