Semiconductor structure and method of forming thereof
US12334400B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Feb 15, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure includes a number of operations. Conductors are formed in a first dielectric layer on a substrate. First conductive vias overlapping the conductors are formed in a second dielectric layer on the substrate. Electrodes are formed in a third dielectric layer on the substrate, wherein each of the electrodes overlaps one of the first conductive vias. A hard mask is formed on the third dielectric layer. Mandrel exposures are formed on the hard mask. Patterning spacers is formed on sidewalls of the mandrel exposures. The mandrel exposures are removed. The hard mask is patterned based on the patterning spacers and the third dielectric layer is patterned based on the patterning spacers to form conductive lines along the second direction in the third dielectric layer, wherein each of the conductive lines overlaps one of the first conductive vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.