Bonding structure using two oxide layers with different stress levels, and related method
US12334461B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Jan 25, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/80896
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bonding structure for a semiconductor substrate and related method are provided. The bonding structure includes a first oxide layer on the semiconductor substrate, and a second oxide layer on the first oxide layer, the second oxide layer for bonding to another structure. The second oxide layer has a higher stress level than the first oxide layer, and the second oxide layer is thinner than the first oxide layer. The second oxide layer may also have a higher density than the first oxide layer. The bonding structure can be used to bond chips to wafer or wafer to wafer and provides a greater bond strength than just a thick oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.