Method of manufacturing semiconductor structure and semiconductor structure
US12336168B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 6, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Jan 11, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
Abstract
Embodiments of the present disclosure relate to the field of semiconductors, and provide a method of manufacturing a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a base, and forming active layers and sacrificial layers on the base, wherein two adjacent ones of the active layers constitute an active group, there is a first distance between the active layers in the active group, there is a second distance between adjacent ones of active groups, and the first distance is greater than the second distance; forming isolation layers, wherein each isolation layer penetrates through all the active layers and all the sacrificial layers, and the isolation layers divide each of the active layers into a plurality of active structures; removing a part of the isolation layers in the word line region and a part of the sacrificial layers located in the word line region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.