Photonic chip and method of manufacture
US12339493B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2020 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Sep 4, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12176
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The invention provides a photonic chip comprising: a silicon substrate, an low refractive index layer above the silicon substrate, and a tapered waveguide above the low refractive index layer, the tapered waveguide having a first height at a first end of the tapered waveguide and a second height at a second end of the tapered waveguide, the second height being greater than the first height, and the tapered waveguide having a bottom surface that is closer to the substrate at the second end than at the first end. The invention further provides a method of manufacturing a photonic chip, the method comprising: providing a wafer comprising a silicon substrate, and an low refractive index layer above the silicon substrate, etching the low refractive index layer to form a tapered trench having a first height at a first end of the tapered trench and a second height at a second end of the tapered trench, the first second height being greater than the second first height, and the tapered trench having a bottom surface that is closer to the substrate at the first second end than at the second first end, and forming a tapered waveguide in the tapered trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.