Static random access memory supporting a single clock cycle read-modify-write operation with a modulated word line assertion
US12340099B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2023 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Oct 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A read-modify-write operation is performed, within a single cycle of a clock signal, by: decoding an address to select a word line of a memory; applying a word line signal at a first voltage level to the selected word line; reading a current data word from a data word location in the memory; reducing the word line signal from the first voltage level to the second voltage level; performing a mathematical modify operation internally within the memory on the current data word to generate a modified data word; increasing the word line signal from the second voltage level to the first voltage level; and writing the modified data word back to the location in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.