Method for manufacturing memory and memory
US12342523B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2021 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Jan 19, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/30
Abstract
The present application provides a method for manufacturing a memory and a memory, which relate to the technical field of memory devices and are used to solve the technical problems of relatively low storage speed and storage efficiency. The manufacturing method includes: providing a substrate, a plurality of capacitor contact pads being disposed at intervals in the substrate; forming a first recess on a first surface of each of the capacitor contact pads; forming conductive pillars in the first recesses, upper end surfaces of the conductive pillars being flush with the first surfaces of the capacitor contact pads; and forming a plurality of capacitors on the substrate, the plurality of the capacitors and the plurality of the capacitor contact pads corresponding one to one and being electrically connected; wherein a first plate of each of the capacitors covers the corresponding conductive pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.