Transistor structure including oxide semiconductor pattern surrounding bottom and sidewall of gate and semiconductor device using the same
US12342530B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2022 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Sep 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/875
Abstract
A transistor structure including an active pattern defined by a first isolation pattern on a substrate, a second isolation pattern at an upper portion of the active pattern, a gate structure extending through the active pattern and the first isolation pattern, at least a lower portion of the gate structure extending through the second isolation pattern, a first oxide semiconductor pattern on a lower surface and a sidewall of the gate structure, the first oxide semiconductor pattern including In-rich IGZO and at least partially contacting the first and second isolation patterns, and source/drain regions at upper portions of the active pattern adjacent to the gate structure may be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.