Network computer with external memory
US12346284B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Apr 25, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1678
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer comprising a plurality of processor devices connected in a ring, wherein each of the processor devices is connected to each of two neighbouring ones of the processor devices by a respective physical inter-processor link. Each of a set of external memory device stores a local portion of the externally stored dataset. Each processor device executes instructions to: determine that a synchronisation point has been reached by the plurality of processor devices; responsive to the determination, access from its connected external memory device its local portion of the externally stored dataset stored; record a copy of its local portion of the externally stored dataset in its local memory; transmit its local portion of the externally stored dataset to at least one of its connected neighbouring processing devices; and receive an incoming portion of the externally stored dataset from at least one of its connected neighbouring processing devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.