Efficient multi-device synchronization barriers using multicasting
US12346752B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Feb 3, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In various examples, a single notification (e.g., a request for a memory access operation) that a processing element (PE) has reached a synchronization barrier may be propagated to multiple physical addresses (PAs) and/or devices associated with multiple processing elements. Thus, the notification may allow an indication that the processing element has reached the synchronization barrier to be recoded at multiple targets. Each notification may access the PAs of each PE and/or device of a barrier group to update a corresponding counter. The PEs and/or devices may poll or otherwise use the counter to determine when each PE of the group has reached the synchronization barrier. When a corresponding counter indicates synchronization at the synchronization barrier, a PE may proceed with performing a compute task asynchronously with one or more other PEs until a subsequent synchronization barrier may be reached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.