Mark Hummel
91Patents
19h-index
111Co-inventors
87Inventor score
Filing activity: Nov 15, 1982 → Aug 24, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6448815B1 | Low voltage differential receiver/transmitter and calibration method thereof | Electricity | 111 | Expired |
| US6950438B1 | System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system | Electricity | 82 | Expired |
| US6721813B2 | Computer system implementing a system and method for tracking the progress of posted write transactions | Physics | 61 | Expired |
| US5016162A | Contention revolution in a digital computer system | Physics | 53 | Expired |
| US7421525B2 | System including a host connected to a plurality of memory modules via a serial memory interconnect | Physics | 45 | Expired |
| US8244978B2 | IOMMU architected TLB support | Physics | 43 | Active |
| US6665742B2 | SYSTEM FOR RECONFIGURING A FIRST DEVICE AND/OR A SECOND DEVICE TO USE A MAXIMUM COMPATIBLE COMMUNICATION PARAMETERS BASED ON TRANSMITTING A COMMUNICATION TO THE FIRST AND SECOND DEVICES OF A POINT-TO-POINT LINK | Electricity | 34 | Expired |
| US7613898B2 | Virtualizing an IOMMU | Physics | 34 | Active |
| US6751684B2 | System and method of allocating bandwidth to a plurality of devices interconnected by a plurality of point-to-point communication links | Electricity | 32 | Expired |
| US6760838B2 | System and method of initializing and determining a bootstrap processor [BSP] in a fabric of a distributed multiprocessor computing system | Physics | 31 | Expired |
| US6745272B2 | System and method of increasing bandwidth for issuing ordered transactions into a distributed communication system | Electricity | 30 | Expired |
| US7917726B2 | Using an IOMMU to create memory archetypes | Physics | 27 | Active |
| US7548999B2 | Chained hybrid input/output memory management unit | Physics | 27 | Active |
| US8489789B2 | Interrupt virtualization | Physics | 25 | Active |
| US8180944B2 | Guest interrupt manager that records interrupts for guests and delivers interrupts to executing guests | Physics | 24 | Active |
| US4569018A | Digital data processing system having dual-purpose scratchpad and address translation memory | Physics | 21 | Expired |
| US7809923B2 | Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU) | Physics | 20 | Active |
| US7640315B1 | Implementing locks in a distributed processing system | Physics | 20 | Expired |
| US8386745B2 | I/O memory management unit including multilevel address translation for I/O and computation offload | Physics | 20 | Active |
| US7069361B2 | System and method of maintaining coherency in a distributed communication system | Electricity | 19 | Expired |
| US7287105B1 | Asynchronous-mode sync FIFO having automatic lookahead and deterministic tester operation | Electricity | 18 | Expired |
| US8806025B2 | Systems and methods for input/output virtualization | Emerging Cross-Sectional Technologies | 18 | Active |
| US7873770B2 | Filtering and remapping interrupts | Physics | 15 | Active |
| US6738917B2 | Low latency synchronization of asynchronous data | Physics | 14 | Expired |
| US9424199B2 | Virtual input/output memory management unit within a guest virtual machine | Physics | 13 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.