Semiconductor device and electronic system including the same
US12347778B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Sep 9, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a substrate including a cell array region and a connection region, an electrode structure stacked on the substrate, each of the electrodes including a line portion on the cell array region and a pad portion on the connection region, Vertical patterns penetrating the electrode structure, a cell contact on the connection region and connected to the pad portion, an insulating pillar below the cell contact, with the pad portion interposed therebetween may be provided. The pad portion may include a first portion having a top surface higher than the line portion, and a second portion including a first protruding portion, the first protruding portion extending from the first portion toward the substrate and covering a top surface of the insulating pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.