Bipolar-CMOS-DMOS semiconductor device having a deep trench isolation structure for high isolation breakdown voltage
US12349452B2 · kind B2 · utility
0Cited by
0References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Mar 1, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/764
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including: a semiconductor substrate including a buried layer; and a deep trench isolation a predetermined depth disposed starting from an upper surface of the semiconductor substrate, wherein the deep trench isolation includes: a first point disposed near the upper surface of the semiconductor substrate; a second point disposed near the buried layer; and a third point disposed near a bottom face of the deep trench isolation, and wherein the deep trench isolation has an inclination such that a width of the deep trench isolation increases from the second point to the third point, is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.