Localized and relocatable software placement and NoC-based access to memory controllers
US12353717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Dec 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a plurality of processing elements and a plurality of memory controllers. The system includes a network on chip (NoC) providing connectivity between the plurality of processing elements and the plurality of memory controllers. The NoC includes a sparse network coupled to the plurality of processing elements and a non-blocking network coupled to the sparse network and the plurality of memory controllers. The plurality of processing elements execute a plurality of applications. Each application has a same deterministic memory access performance in accessing associated ones of the plurality of memory controllers via the sparse network and the non-blocking network of the NoC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.