Three-dimensional semiconductor memory device and electronic system including the same
US12354659B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Jan 24, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor memory device includes: a stack structure including a ground selection line, first word lines, second word lines, and a string selection line, which are sequentially stacked on a substrate; vertical channel structures penetrating the stack structure and arranged to form a plurality of columns; a lower separation structure crossing a lower portion of the stack structure in a first direction and dividing the ground selection line along a second direction intersecting the first direction; and first and second upper separation structures crossing an upper portion of the stack structure in the first direction and dividing the string selection line along the second direction, wherein the lower separation structure and the first upper separation structure are vertically overlapped with one of the columns of the vertical channel structures, and the second upper separation structures are provided between the vertical channel structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.