Semiconductor device
US12354987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2024 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Apr 16, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including a semiconductor chip, a redistribution layer structure disposed under the semiconductor chip, a bump pad disposed under the redistribution layer structure and having an upper structure of a first width and a lower structure of a second width less than the first width, a metal seed layer disposed along a lower surface of the upper structure and a side surface of the lower structure, an insulating layer surrounding the redistribution layer structure and the bump pad, and a bump structure disposed under the bump pad. A first undercut is disposed at one end of the metal seed layer that contacts the upper structure, and a second undercut is disposed at an other end of the metal seed layer that contacts the lower.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.