Three-dimensional memory device and fabrication method
US12354994B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jun 13, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Aug 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Three-dimensional (3D) NAND memory devices and methods are provided. In one aspect, a fabrication method includes forming a conductor/insulator stack over a substrate, forming a dielectric layer of a dielectric material including atomic hydrogen over a part of the conductor/insulator stack, and performing a thermal process to release the atomic hydrogen from the dielectric material and diffuse the atomic hydrogen into the conductor/insulator stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.