Patent · US Active

Gate driver circuit for sampling without a triggering point

US12355462B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Tommaso Bacigalupo · San Jose, US
Marco Bachhuber · Dundenheim, DE
Michael Krug · Munich, DE

Key dates

Filing date	May 2, 2023
Grant date	Jul 8, 2025
Priority date	—
Expiry date	Jan 8, 2044

Classification

Technology area (CPC H)Electricity
CPC primaryH03K17/063
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A gate driver circuit includes one or more datastores configured to store one or more result registers, timer circuitry configured to generate a timing signal, and logic circuitry. The logic circuitry is configured to drive switching circuitry using a switching signal and determine a triggering point of a first cycle of the switching signal. In response to the determination of the triggering point, the logic circuitry is configured to control, using the switching signal, one or more analog-to-digital converters (ADCs) to store a first data sample at the one or more result registers. In response to a determination that the switching signal does not include a triggering point, the logic circuitry is configured to control, using the timing signal, the one or more ADCs to store a second data sample at the one or more result registers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.