Semiconductor structure having asymmetric source/drain regions
US12356684B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Nov 14, 2023 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Nov 14, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.