Structure and method for testing of PIC with an upturned mirror
US12366603B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2024 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Mar 4, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/423
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A structure and method for the wafer level testing of interposer-based photonic integrated circuits is described that includes the formation of an upturned mirror structure and the method of utilizing the interposer-based mirror structure for electrical and optical testing of optoelectrical circuits that include emitting components such as lasers, detecting components such as photodetectors, and both emitting and detecting components. Electrical activation of the optoelectrical emitting or sending devices and the subsequent detection and measurement of the optical signals in detecting or receiving devices provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.