Manufacturing method of semiconductor structure comprising a gap and semiconductor structure comprising a gap
US12368074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2022 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Feb 19, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present application provide a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a base with an electrical contact layer therein; forming an insulating layer on the base, the insulating layer having a through hole penetrating the insulating layer, and the through hole exposing a surface of the electrical contact layer; forming a sidewall layer on a sidewall of the through hole; forming a first isolation layer, the first isolation layer covering a surface of the sidewall layer and an exposed surface of the insulating layer; removing the sidewall layer to form a gap between the first isolation layer and the insulating layer; and forming a conducting layer filling the through hole, the conducting layer being electrically connected to the electrical contact layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.