Zero voltage program state detection
US12379989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2023 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Mar 20, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/50004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
For NAND devices having a zero voltage program state as a result of a preconditioning operation, detecting the status of the zero voltage program state is important for customers to quickly validate their component and SSD flows to improve NAND retention and reliability after assembly and die level re-work. A zero voltage program state detection operation quickly determines the validity of the zero voltage program state of a NAND page of a NAND device. The detection operation includes reading a NAND page with reference voltages that delimit a predetermined acceptable range of voltage levels below and above a zero threshold voltage. If NAND memory cells having threshold voltage levels that fall below or above the acceptable voltage levels exceed a predetermined failed bytes limit for the NAND page, the zero voltage program state is invalid.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.