Memory system and operation method thereof and memory controller
US12386739B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2024 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Mar 27, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory device, and a memory controller which is coupled with the memory device and configured to: compress a first mapping table, to obtain a second mapping table, wherein the first mapping table includes a correspondence relation between an exponent portion of each element of all elements corresponding to an error correction coding equation and an equation coefficient, the exponent portions of all the elements are a group of continuous data; the second mapping table includes a correspondence relation between the exponent portions of part of all the elements and the equation coefficients, the exponent portions of the part of the elements comprise a plurality of pieces of node data extracted from the continuous data; and acquire the equation coefficient corresponding to the exponent portion of any element of all the elements using the node data in the second mapping table through a segmented query.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.