Methods for programming a memory device, memory devices, and memory systems
US12387794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2022 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Nov 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming a memory device, a memory device, and a memory system are disclosed. The memory device includes planes. The method includes: programming the planes by using a programming voltage incremented with a first step size; verifying the planes, and in response to determining that one or more planes are with a verification exception, disabling the one or more planes with the verification exception; and in response to the one or more planes with the verification exception being disabled, programming remaining one or more planes that are not disabled by using an other programming voltage incremented with a second step size less than the first step size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.